Circuit for dynamic control of a power transistor in applications for high voltage

The present invention relates to a circuit (20) for dynamic control of a power transistor in applications for high voltage and of the type wherein a power transistor (TR1) has a conduction terminal (C) connected to a load and a control terminal (G1) receiving a driving signal from a driver block (4) activated by a trigger signal (Vin) received on a circuit input terminal (IN1). Advantageously, the circuit (20) comprises a JFET component (TR2) inserted between the conduction (C) and control (G1) terminal of the power transistor (TR1) and equal to a resistance with non-linear feature. Moreover, the JFET component (TR2) is monolithically integrated in the structure of said power transistor (TR1).