IBM Unveils Nanostack Transistor Architecture to Enable Sub 1 Nanometer Chips

IBM sub 1 nanometer silicon transistor process achieves 7 angstrom scale using Nanostack 3D architecture for massive performance and artificial intelligence efficiency

IBM has made the world's first sub 1 nanometer silicon transistor process , achieving a physical dimension of 0.7 nanometers (or 7 angstroms). As stated by the official IBM research paper, this innovation circumvents the physical boundaries of two dimensional silicon scaling by employing a 3D transistor architecture which they term Nanostack. IBM predicts this structural change would be implemented into commercial manufacturing stands within 5 years.