{
  "$type": "site.standard.document",
  "description": "Described are mechanisms and methods for reducing CPU power upon interruption of a supplied power. In some embodiments, an apparatus may comprise an input to receive an indicator that a supply voltage to a computer system has been interrupted. The apparatus may comprise an output to provide an…",
  "path": "/patents/1290797",
  "publishedAt": "2021-05-20T00:00:00.000Z",
  "site": "at://did:plc:oql6ds5vnff4ugar6rruliwd/site.standard.publication/3mn3ohu7oxx5w",
  "tags": [
    "G06F1/30",
    "Intel Corporation"
  ],
  "textContent": "Described are mechanisms and methods for reducing CPU power upon interruption of a supplied power. In some embodiments, an apparatus may comprise an input to receive an indicator that a supply voltage to a computer system has been interrupted. The apparatus may comprise an output to provide an indicator to reduce a processor power consumption level. The apparatus may also comprise a circuitry to establish the indicator to reduce the processor power level based upon the indicator that the supply voltage to the computer system has been interrupted.",
  "title": "HANDLING LOSS OF POWER FOR UNINTERRUPTIBLE POWER SUPPLY EFFICIENCY"
}