APPARATUS AND METHOD FOR SYNCHRONIZING VBE CLOCK IN HVDC SYSTEM

The present invention relates to an apparatus and a method for synchronizing a clock of VBE in a HVDC system capable of increasing reliability by synchronizing the clock of the VBE in the HVDC system to suppress harmonic generation and generate duplicate clock to supply stable clock to submodules. The apparatus for synchronizing the clock of the VBE in the HVDC system comprises an operation board for creating a reference clock and an interface board for controlling submodules on or off being synchronized to a reference clock.