GATE DRIVER CIRCUIT FOR A SYNCHRONOUS RECTIFIER OF A WIRELESS POWER RECEIVER SYSTEM

A gate driver circuit for a synchronous rectifier (SR) of a wireless power receiver (WPR) system includes: a first RC filter that outputs a delayed turn-on signal for a first high-side SR switch based on a signal input to the filter that indicates a zero-crossing condition for a coil current of the WPR system in a first direction; a second RC filter that outputs a delayed turn-on signal for a second high-side SR switch based on a signal input to the filter that indicates a zero-crossing condition for the coil current in the opposite direction; a first digital delay-and-hold circuit electrically connected to the output of the first RC filter and that stabilizes the delayed turn-on signal output by the first filter; and a second digital delay-and-hold circuit electrically connected to the output of the second RC filter and that stabilizes the delayed turn-on signal output by the second filter.