POWER-ON RESET CIRCUITRY, AN IMPLANT DEVICE AND A METHOD FOR GENERATING A POWER-ON RESET SIGNAL

A power-on reset, POR, circuitry comprises: a comparator configured to output a POR trigger signal in dependence of a relation between a supply voltage and a target voltage level, wherein the comparator comprises a first output part configured to receive a balanced input; a trust unit comprising a second output part forming a replica of the first output part and configured to receive an unbalanced input, wherein the comparator and the trust unit are arranged in a common integrated circuit and wherein the trust unit is configured to output a trust signal indicating whether the POR trigger signal is trustable; and a decision unit configured to output a POR signal in dependence of the POR trigger signal and the trust signal.