{
  "$type": "site.standard.document",
  "description": "In various examples, an integrated circuit includes first and second portions. The first portion includes a timer that starts when the first portion transmits at least one error signal to the second portion. The timer may reset when data corresponding to at least one fault has been cleared from the…",
  "path": "/patents/1369005",
  "publishedAt": "2024-09-12T00:00:00.000Z",
  "site": "at://did:plc:oql6ds5vnff4ugar6rruliwd/site.standard.publication/3mn3ohu7oxx5w",
  "tags": [
    "B60W60/0016",
    "NVIDIA Corporation"
  ],
  "textContent": "In various examples, an integrated circuit includes first and second portions. The first portion includes a timer that starts when the first portion transmits at least one error signal to the second portion. The timer may reset when data corresponding to at least one fault has been cleared from the first portion. The first portion transmits a timeout error signal when the timer indicates at least a predetermined amount of time has elapsed. The second portion receives the at least one error signal and the timeout error signal when the timeout error signal has been sent. The second portion may notify an external system after the timeout error signal is received.",
  "title": "COMMUNICATING FAULTS TO AN ISOLATED SAFETY REGION OF A SYSTEM ON A CHIP"
}