{
  "$type": "site.standard.document",
  "description": "A phase-locked loop circuit (24) comprises a phase error detector (26) for receiving a multi-phase reference signal (40) and a synchronized phase signal (38) of the phase-locked-loop circuit, and for performing a rotational transformation to convert the multi-phase reference signal into two-phase…",
  "path": "/patents/1014134",
  "publishedAt": "2011-04-06T00:00:00.000Z",
  "site": "at://did:plc:oql6ds5vnff4ugar6rruliwd/site.standard.publication/3mn3ohu7oxx5w",
  "tags": [
    "H03L7/085",
    "GEN ELECTRIC [US]"
  ],
  "textContent": "A phase-locked loop circuit (24) comprises a phase error detector (26) for receiving a multi-phase reference signal (40) and a synchronized phase signal (38) of the phase-locked-loop circuit, and for performing a rotational transformation to convert the multi-phase reference signal into two-phase quantities (32, 34) at a synchronous rotation d-q reference frame. A monotonic transfer module (27) receives the two-phase quantities, and generates a monotonic phase error signal (36) which is monotonic when a phase difference between the multi-phase reference signal and the synchronized phase signal ranges from -180 degrees to 180 degrees. A regulator (28) receives the monotonic phase error signal, and generates a synchronized rotation frequency (39). An integrator (30) receives the synchronized rotation frequency, and generates the synchronized phase signal.",
  "title": "Phase-locked-loop circuit"
}