SWITCH TURN-OFF CIRCUIT

Aspects of the present disclosure provide for a circuit comprising a switch coupled between a first node and a second node, a first transistor having a gate terminal, a drain terminal coupled to the second node, and a source terminal coupled to a ground terminal, a logic gate having a first input, a second input coupled to a third node, and an output coupled to the gate terminal of the first transistor, and a comparator having a first input coupled to the second node, a second input coupled to a fourth node, and an output coupled to the first input of the logic gate.