{
  "$type": "site.standard.document",
  "description": "A digital phase locked loop includes an automatic gain control that applies a gain to an input signal in order to provide a gain controlled signal. A 90° phase shifter applies a 90° phase shift to the gain controlled signal in order to provide a 90° phase shifted version of the gain controlled…",
  "path": "/patents/1070497",
  "publishedAt": "2006-02-01T00:00:00.000Z",
  "site": "at://did:plc:oql6ds5vnff4ugar6rruliwd/site.standard.publication/3mn3ohu7oxx5w",
  "tags": [
    "G01C19/56",
    "HONEYWELL INT INC [US]"
  ],
  "textContent": "A digital phase locked loop includes an automatic gain control that applies a gain to an input signal in order to provide a gain controlled signal. A 90° phase shifter applies a 90° phase shift to the gain controlled signal in order to provide a 90° phase shifted version of the gain controlled signal. A phase detector is driven by the gain controlled signal, by the 90° phase shifted version of the gain controlled signal, and by sinusoidal and co-sinusoidal signals. A loop filter integrates an output of the phase detector and provide servo equalization for the phase-locked loop. A digital dual frequency oscillator has a fundamental frequency controlled by an output signal from the loop filter. Also, the digital dual frequency oscillator generates the sinusoidal and co-sinusoidal signals.",
  "title": "A wide band digital phase locked loop (pll) with a half-frequency output"
}