Method and circuitry for generating a fault signal in a voltage regulator

A method for generating a fault signal in a system voltage (Aplus) regulator by a phase signal (PH) is disclosed, which comprises the steps of: detecting the system voltage (Aplus) and phase signal (PH); comparing the system voltage (Aplus) and phase signal (PH) with respective fault levels (REG, Sfault); and generating a fault signal (Fault) upon either the system voltage (Aplus) or the phase signal (PH) falling below the respective fault level of the fault levels (REG, Sfault). Advantageously in this invention, the fault signal generating method further comprises a step of inhibiting the step of generating a fault signal (Fault) by means of a drive signal (DF) of the system voltage regulator. A diagnostic circuitry (10) for a system voltage regulator (1), implementing the inventive method, is also disclosed.