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Synopsys Converge 2026: When "New Synopsys" Takes the Stage for the First Time

On March 11, 2026, Synopsys did something seemingly small but deeply telling at its annual user conference — it renamed the long-standing "SNUG" (Silicon User Group) to "Synopsys Converge." The old name served chip designers. The new one attempts to embrace a far larger constituency: systems engineers, physics simulation specialists, software developers, and everyone else being swept onto the same boat by the complexity of the AI era.

The name change is not a marketing gimmick. It is the culmination of every strategic move Synopsys has made over the past two years — the $34.9 billion Ansys acquisition, NVIDIA's $2 billion equity investment, a sweeping internal restructuring — converging into a single, physical event. CEO Sassine Ghazi stood on stage and declared: "2026 is Year One for the new Synopsys."

The weight of that statement depends entirely on what the audience saw over the next two days.

Why "Converge"

In my earlier analysis of Synopsys's 1Q26 earnings, I noted that Converge 2026 was a catalyst the market had been waiting for — investors needed to see concrete joint product details and early customer feedback. At the end of that piece, the central suspense was: margins have been validated, but when does organic growth catch up?

Converge's answer was not a number. It was a methodology. Ghazi distilled it into three words: Co-design, Digital Twin, Agentic AI.

None of these concepts are new in isolation. Co-design has been discussed in the semiconductor industry for decades. Digital twins are a familiar topic in industrial software. Agentic AI has been the buzzword of the broader tech industry since 2025. What Synopsys is really arguing is not that it invented these ideas, but that — having completed the Ansys acquisition and secured NVIDIA's accelerated computing capabilities — it is the only company positioned to execute all three simultaneously across the full "silicon to systems" spectrum.

That is a bold claim. Let's examine what backs it up.

The First Piece: Multi-Physics Fusion — Tangible Evidence of the Ansys Integration

Over recent quarters, discussions around Ansys integration have largely remained at the financial level — Ansys contributed $885.6 million in revenue during 1Q26, beating expectations; cost synergies are accelerating; cross-selling has begun generating revenue. But for the engineering users who actually build things, the real question has always been: how exactly do Synopsys and Ansys technologies fit together?

The Multi-Physics Fusion technology unveiled at Converge is the first concrete answer.

Synopsys has natively integrated Ansys's multi-physics analysis engines — thermal, electromagnetic, and stress — into its core EDA tools. The first wave includes four solutions currently in beta testing, each targeting a specific pain point:

• Timing sign-off : PrimeTime as the host, integrating RedHawk's thermal stress and IR-aware STA analysis to address extreme corner conditions at advanced nodes
• Multi-die design : 3DIC Compiler as the host, integrating HFSS-IC for electromagnetic and signal integrity analysis
• Design closure : PrimeClosure as the host, integrating RedHawk and Totem to deliver sigma DVD (dynamic voltage drop) analysis
• Analog design : Custom Compiler and PrimeSim as the host, integrating Totem for deeper inductance analysis

Synopsys's co-design strategy framework presented at Converge 2026 — vertical co-design optimizes within the electronics domain (AI, software, silicon), while horizontal co-design spans across electronics, mechanical, and thermal physics domains

source: Synopsys Converge 2026 Keynote Presentation

A technical detail here is worth unpacking. In the traditional EDA flow, chip design and physical effects analysis are separate activities. Engineers complete their design in Fusion Compiler, only to discover IR drop violations or thermal hotspots at the sign-off stage — forcing them into repeated iterations. Each cycle means adding more safety margin to the design, which is just a polite way of saying "overdesign." Those margins translate directly into wasted area, excess power consumption, and delayed time to market.

The core value of Multi-Physics Fusion lies in shifting these physical analyses upstream into the design phase itself. Shankar Krishnamoorthy, Synopsys's General Manager, demonstrated a telling comparison during his technical presentation: the legacy IR drop curve (blue) showed numerous violations emerging at sign-off, while the new curve with Multi-Physics Fusion (red/orange) resolved those violations during the design stage. In his words, this not only reduces iteration cycles but can actually recover PPA (power, performance, area), because designers no longer need to build in as many defensive margins.

Intel's Lip-Bu Tan offered a direct endorsement: "Multi-physics fusion is critical for advanced packaging such as EMIB and for our advanced logic nodes." He confirmed Intel would continue collaborating with Synopsys on 18A, 14A, and more advanced process nodes.

This is the first tangible artifact of the "silicon to systems" vision I described in my analysis of the NVIDIA-Synopsys alliance. Before, it was boxes on a PowerPoint slide. Now it is a tool in the hands of beta customers.

Alongside Multi-Physics Fusion, Ansys 2026 R1 — the first major Ansys product release since the acquisition — also shipped on the same day. It includes the integration of VC Functional Safety Manager with Ansys medini analyze (an end-to-end safety analysis workflow), QuantumATK with Granta MI (an atomic-to-enterprise materials workflow), and OptoCompiler with Lumerical FDTD (photonic IC design). Every integration point aims at the same objective: eliminating manual data transfers between tools and enabling engineers from different disciplines to work within a unified environment.

The Second Piece: Electronic Digital Twin — A Platform-Level Ambition

If Multi-Physics Fusion is about injecting physics into the existing EDA flow, the Electronic Digital Twin platform points toward something larger: completing as much verification as possible in a virtual model before any physical product is built.

Ghazi offered a set of numbers to illustrate why this is urgent. Global R&D spending reached $1.7 trillion in 2025, yet only 10% went toward automation and technology tools — the remaining 90% still went to labor and physical prototyping. Within that 90%, 75% of the time was spent eliminating failures, and 60% of those failures originated in the initial design phase.

The layered architecture of Synopsys's newly launched Electronic Digital Twin platform — from Cloud Infrastructure at the base, through the SIL KIT system integration layer (encompassing virtualization engines, hardware-assisted verification, and physical hardware), up to the Workflows & Analytics and Intelligent Test Automation & Orchestration layers

source: Synopsys Converge 2026 Keynote Presentation

The platform Synopsys launched is an open, cloud-based architecture, built in collaboration with more than 30 ecosystem partners. Initially targeting the automotive market, it allows OEMs to complete 90% of software validation before hardware is even available — by "shifting left" software development and system integration to reduce development cost and time to market.

An easily overlooked but important product update accompanied this announcement. Synopsys simultaneously released its next-generation hardware verification platforms: ZeBu Server 5 (2x improvement in emulation performance and capacity versus the prior generation) and HAPS-200 (scaling from 6 FPGAs to 12 FPGAs on a single board, also delivering 2x performance gains). The clever design detail is that ZeBu-200 can run the emulation software stack on the same ZeBu Server 5 hardware, enabling dual-purpose use from a single piece of infrastructure. Ghazi was careful to emphasize that this is a "software-defined" system — performance improvements do not require hardware replacement; they can be delivered through software updates.

He used a rather persuasive analogy: historically, moving from one hardware generation to the next (say, ZS3 to ZS4 to ZS5) typically delivered a 2x performance improvement and 1.5x capacity gain. Now, a software update on existing hardware can achieve close to 2x performance. The comparison to Tesla's over-the-air update philosophy comes naturally — hardware is the vessel, software is the value.

The Third Piece: L4 Agentic Workflow — From Roadmap to Live Demo

The race for agentic AI in EDA has intensified considerably. In my earlier analysis of Cadence's ChipStack, I compared two divergent paths in detail: Cadence taking the "organic integration" route, productizing an acquired startup within three months; Synopsys pursuing the "alliance + acquisition" route, building a larger system atop the NVIDIA ecosystem and its AgentEngineer architecture.

The L4 Agentic Workflow showcased at Converge represents the farthest Synopsys has traveled along its chosen path.

Synopsys's announcement of the industry's first L4 Agentic Workflow at Converge 2026 — an adaptive learning, multi-agent orchestrated system that can execute a complete closed loop from architectural specification through RTL design, test planning, static verification, formal/functional verification, and coverage debugging

source: Synopsys Converge 2026 Keynote Presentation

Let me first explain Synopsys's autonomy framework. It borrows from the self-driving car tiering system: L1 represents Copilots (currently 6, covering various stages of the design flow), L2 covers Task Agents (24, each specialized for a specific task), L3 denotes Multi-Agent Workflows (3, where one agent manages and orchestrates multiple task agents), and L4 introduces a cognitive layer requiring contextual intelligence — agents capable of dynamically orchestrating multiple peers, adaptively planning and executing.

The live demo of the L4 workflow showed the complete autonomous spec-to-RTL flow: the agent reads the specification document and generates RTL → automatically generates and runs tests → identifies 2 failing tests → autonomously debugs and fixes the failures → iteratively performs Lint checks and fixes → invokes Fusion Compiler via MCP to verify RTL synthesizability → ultimately delivers RTL that is functionally verified, Lint-clean, and synthesizable.

Morgan Stanley's post-Converge report noted that large SoC verification tasks typically require a team 4–6 months to complete, and that some customer deployments have already achieved 2x productivity gains, with up to 5x improvement in select cases. However, Morgan Stanley also candidly flagged a question investors care about but Converge left unanswered: Synopsys has not yet disclosed the monetization model or pricing strategy for its agentic AI products. This was a technology conference, not an investor day.

Worth mentioning, Shankar during his technical session also revealed a set of more quotidian agent applications: a Lint Agent that fixed all Lint errors within 3 iterations and delivered clean RTL; a congestion and DRC mitigation agent that autonomously analyzed congestion maps, identified root causes, formulated an attack plan, implemented fixes, and delivered a DRC-clean layout ready for tapeout. These are not concepts on a slide — they are tools already running across 15 customer engagements spanning L1 through L4 agent projects.

Jensen and Satya: Why Two CEOs Showed Up in Person

An EDA user conference simultaneously hosting the CEOs of NVIDIA and Microsoft is, in and of itself, a signal.

Jensen Huang arrived with his trademark showmanship. He opened with a story from 20 years ago: he once gifted 250,000 shares of NVIDIA stock to Synopsys. Today, those shares would be worth roughly $500 billion — and co-founder Aart de Geus claims he can't find them. The room erupted in laughter.

But the jokes gave way to a serious technical argument. Jensen introduced the concept of "extreme co-design" : NVIDIA has evolved from producing a single chip per generation at one company to shipping seven chips per year, with system scale and complexity reaching a point where "the next step is that the computer will be as large as a building, and the building itself becomes part of the system." At a gigawatt-scale data center, wasting 10% of energy means losing $1 billion a year. The scope of co-design has expanded from the chip to the infrastructure itself.

More noteworthy was his declaration on CUDA acceleration. Jensen said CUDA has been around for 20 years, but "this is a phase change moment — CUDA is now ubiquitous." He predicted that the number of "virtual engineers" using Synopsys tools would increase by orders of magnitude — every NVIDIA engineer would command a large contingent of Synopsys agents specializing in different stages of the design flow. Then, half-jokingly: "If you don't have a site license yet, you'd better get one soon. Tool usage is going to grow exponentially." Ghazi smoothly countered that their products aren't sold by license count. Jensen fired back that he was just helping "sell SNPS stock."

The exchange was playful, but the underlying logic is practical. If agentic AI truly enables each human engineer to deploy hundreds or thousands of virtual agents running EDA tools, then EDA's computational consumption — and, potentially, its revenue model — undergoes a structural shift. This mirrors the "270,000-engineer gap" problem I discussed in my Cadence ChipStack piece: the point is not to replace engineers, but to amplify each engineer's output by orders of magnitude.

Satya Nadella approached from a different angle. He traced the four-year history of the Microsoft-Synopsys collaboration — from EDA cloud services on Azure, to Copilot-driven UI simplification, to the current frontier of agentic engineering. His core insight was to frame EDA tools as "scaffolding" for generative AI — just as programming improved because of human-engineered feedback loops like Git and worktrees, EDA as a toolset and toolbox for AI will propel agent engineers into becoming the next major driver of engineering productivity.

Satya also made a remark that visibly energized Ghazi: "Synopsys's deep domain knowledge of physics will soon be encapsulated into physics foundation models — and that will become the engine powering the next generation of EDA." The implication runs deeper than current EDA tools suggest: decades of accumulated design rules, physical constraints, and process knowledge compressed into foundation model weights, forming the substrate upon which agents reason.

Accelerated Computing: From Concept to Numbers

In my December analysis of the NVIDIA-Synopsys alliance, I noted Jensen's prediction that most organizations would begin transitioning to accelerated computing within 2–3 years, with performance gains ranging from 10x to over 1,000x. Converge added some more specific figures.

Shankar disclosed during his technical presentation that GPU acceleration for computational lithography (OPC) has improved from 5x three years ago to nearly 30x today — driven not just by newer GPU architectures like Hopper and Blackwell, but also by ongoing API and code-level optimization between Synopsys and NVIDIA. HBM SPICE simulation has also achieved "significant acceleration" (no specific multiple disclosed). Over the next 12 months, additional EDA and simulation capabilities will come online with GPU acceleration, including RC extraction, physical verification, and the RedHawk-SC Electrothermal power integrity flow.

Meanwhile, NVIDIA Omniverse's positioning as "the operating system for physical AI" has come into sharper focus. Synopsys's Ansys Fluent (computational fluid dynamics) and AVxcelerate (autonomous vehicle simulation) will be among the first products integrated into Omniverse, delivering high-fidelity environmental digital twins. Jensen's description was vivid: "Digital simulation testbeds are relatively easy. But if you want to create a testbed for physical AI, that testbed must represent the physical world. It must obey the laws of physics. That is extraordinarily difficult."

The One-Year Clock: The Cadence of the AI Superchip Era

One data point from Shankar's presentation deserves particular attention: the semiconductor industry has entered a "one-year clock" cycle. NVIDIA, AMD, and Tesla are all shipping new chips on an annual cadence, because AI compute demand grows 4.4x per year while Moore's Law delivers only 15–30% improvement annually.

What does this gap mean? It means process advances alone are no longer sufficient — simultaneous innovation across architecture, packaging, software, and design methodology is required. Shankar highlighted three recently announced AI superchips — NVIDIA Vera Rubin, Microsoft Maia 200, AMD MI450 — each demanding no-compromise execution across performance, quality (right-first-time silicon), and speed (one-year cycles).

Advanced packaging is the critical battlefield. Shankar showed that packaging has evolved from traditional designs with a few thousand connection points to today's 3.5x–5.5x reticle-size packages containing one trillion transistors, with the roadmap pointing toward 9.5x reticle-size wafer-level systems. Synopsys's 3DIC Compiler platform is purpose-built for this challenge — based on Fusion Compiler, it provides a single cockpit environment integrating prototyping, implementation, and sign-off, supporting connection technologies from hybrid bonding to co-packaged optics.

In a customer collaboration case study, Synopsys demonstrated how AI and HFSS were used to automate HBM4 interface routing: faster execution times and improved KPIs (insertion loss, shorter trace lengths, crosstalk, and cleaner eye diagrams). On the same day, Synopsys also revealed a notable milestone: the industry's first HBM4 IP test chip had arrived at its lab and was running successfully, achieving speeds above 9 Gbps with potential to reach 12 Gbps.

What Was Not Said

Morgan Stanley's post-Converge report crisply summarized the parts of the conference that went unaddressed: no monetization guidance for agentic AI products, and no financial update on Ansys synergies.

This was not surprising — Converge is a technology conference, not an investor day. But it does mean the market is still waiting for two key answers. First, when agentic workflows move from demos to scaled deployments, how does Synopsys intend to charge? Traditional license models, compute-based consumption pricing, or value-based pricing? The CEO previously remarked during the 1Q26 earnings call that "when the workflow changes, that's the opportunity to change the monetization model" — but specifics remain undisclosed.

Second, have the $400 million cost synergy and $400 million revenue synergy targets for Ansys changed? Management has recently hinted that synergies could be realized ahead of schedule, but investors need concrete numbers at the next earnings report.

Some Thoughts

Standing at the close of Converge 2026 and looking back, my assessment of Synopsys can be summarized simply: it demonstrated the technological possibility of "New Synopsys," but has not yet demonstrated its economic possibility.

Multi-Physics Fusion is a genuine technical breakthrough — it addresses a long-standing pain point in advanced node and advanced packaging design, and customers like Intel and AMD are validating it in beta testing. The Electronic Digital Twin platform's vision is ambitious, but the initial focus on automotive is sensible — that is one of the deepest segments of Ansys's original customer base. The L4 Agentic Workflow live demo was impressive, yet anyone who has shipped software knows the distance between a demo and production.

Jensen and Satya's appearances added narrative weight, but their remarks were not materially different from what was said during the NVIDIA-Synopsys alliance announcement last December — CUDA acceleration, Omniverse integration, exponential growth in agent count. These are directionally sound judgments, not discountable commitments.

What genuinely piqued my interest was a detail that could easily be overlooked: Shankar mentioned during his presentation that 270 chips at 3nm and below have been taped out using IC Validator, and more than 30 customers are developing IP on the N2P process node. These numbers speak not to the future, but to the present — Synopsys's engagement depth at the most advanced process nodes is demonstrably real. When agentic AI, multi-physics fusion, and GPU acceleration layer onto this existing customer stickiness, the potential for compound effects is tangible.

But the leap in organic growth from mid-single digits to double digits — the central question I raised in the 1Q26 earnings analysis — Converge did not answer. That answer may not surface until FY2027.

Until then, the story of "New Synopsys" remains a narrative about potential, not one about proof. The distance between those two is the space investors must measure with patience.