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"path": "/t/include-racy-reads-in-rust-memory-model-with-maybeinvalid-t/24289?page=2#post_26",
"publishedAt": "2026-05-25T12:20:19.000Z",
"site": "https://internals.rust-lang.org",
"textContent": "RalfJung:\n\n> I'm afraid this will remain hypothetical until someone actually works out a memory model that can do this.\n\nAt the risk of rehashing one of our previous discussions, I believe that inline assembly is a perfectly valid escape hatch for SeqLock. In other words, something like this could be considered sound in the context of SeqLock:\n\n\n unsafe fn racy_read<T>(src_ptr: *const T) -> MaybeUninit<T> {\n let mut dst: MaybeUninit<T> = MaybeUninit::uninit();\n unsafe {\n core::arch::asm!(\n \"<read T from src_ptr into dst>\",\n in(reg) src_ptr,\n in(reg) size_of::<T>(),\n in(reg) &mut dst,\n options(preserves_flags),\n );\n }\n dst\n }\n\n\nYes, we can not properly describe what the block does in terms of AM, but we can say that it reads _something_ into `dst` and the resulting data can be interpreted as `T` (by calling `assume_init`) only if the `SeqLock` validity check has passed. The write probably also should be accompanied by an (empty) asm block to \"observe\" the write.\n\nValidity of this reasoning relies on \"external\" knowledge of knowing that the assembly block does on the given CPU arch.\n\nWhether such operation should be or could be exposed on the language level is a separate question.",
"title": "Include racy reads in Rust memory model with `MaybeInvalid<T>`"
}