{
  "$type": "site.standard.document",
  "bskyPostRef": {
    "cid": "bafyreifv6ehchbjlopncg4zlvxsrtcbrwtghky6wfjl2v4uj7db7s64vfu",
    "uri": "at://did:plc:ivbknywyskln22er3nkssdhl/app.bsky.feed.post/3mliopmwxt3a2"
  },
  "path": "/t/include-racy-reads-in-rust-memory-model-with-maybeinvalid-t/24289#post_5",
  "publishedAt": "2026-05-10T09:40:49.000Z",
  "site": "https://internals.rust-lang.org",
  "tags": [
    "this paper"
  ],
  "textContent": "I'm afraid this will remain hypothetical until someone actually works out a memory model that can do this. Currently, all we have is a sketch. Getting rid of data race UB fundamentally alters the core of the model, so we don't know which of the existing results (DRF theorems, optimizations, lowerings to asm) remain valid. We definitely know it's not trivial; this paper explored a semantics that avoids such UB -- but it works very different from the C++ memory model, so we can't just switch to that or we'd have trouble linking Rust code and C++ code.\n\nThe LB example from that paper (page 5) is particularly interesting:\n\nSomehow we have to say that it is legal for that program to print 1 from both threads. Currently we achieve this by saying that the program is UB so anything can happen. If read-write races are no longer UB, this means non-atomic accesses have to participate in the memory model in a much deeper way than they do now, and I don't think anyone knows what that should look like.\n\nSo I'm afraid this idea is many years of research away from being realizable, unfortunately.",
  "title": "Include racy reads in Rust memory model with `MaybeInvalid<T>`"
}