{
"$type": "site.standard.document",
"bskyPostRef": {
"cid": "bafyreiggncpecg45pdeohevvijotgnzfrylclcn7p65q2j23phgg52cqci",
"uri": "at://did:plc:fuaxi56ej27ymlesklypt3ar/app.bsky.feed.post/3mbftrsrjfhs2"
},
"coverImage": {
"$type": "blob",
"ref": {
"$link": "bafkreibowfmg54cy6mlb3be6zyfzhskgl5tpetxjfrmm3tpdu6vfawbh5e"
},
"mimeType": "image/jpeg",
"size": 170183
},
"description": "The same number of channels of EEG/EMG/ECG for half the price",
"path": "/cerelog-esp-eeg-affordable-openbci-like-board/",
"publishedAt": "2026-01-02T02:24:36.000Z",
"site": "https://www.autodidacts.io",
"tags": [
"100DaysToOffload",
"View more posts in this series.",
"source-available",
"firmware",
"schematic",
"https://github.com/Cerelog-ESP-EEG/ESP-EEG",
"https://www.cerelog.com/eeg_researchers.html",
"https://www.cerelog.com/eeg_researchers_guide.html",
"https://x.com/CerelogOfficial",
"https://old.reddit.com/r/BCI/comments/1polj4b/i_designed_an_open_source_8channel_eeg_board/",
"https://www.cerelog.com/investor_info.html",
"https://www.cerelog.com/tdcs_researchers.html",
"https://www.youtube.com/watch?v=6XKdIbguI00",
"it says",
"elsewhere it says",
"some places",
"clarified the licencing",
"responds"
],
"textContent": "****Note:**** this post is part of #100DaysToOffload, a challenge to publish 100 posts in 365 days. These posts are generally shorter and less polished than our normal posts; expect typos and unfiltered thoughts! View more posts in this series.\n\n\n\n\nI recently ran across a new open-source (or is it source-available?) EEG board that looks interesting: the Cerelog ESP-EEG.\n\nCerelog ESP-EEG development board in action\n\nAt its heart is the Texas Instruments ADS1299 (24-bit, 8-channel) analog-digital converter, the same chip the OpenBCI Cyton uses.\n\nSo what's different or better about the Cerelog? From my perusal of the materials, it seems that the selling point is cleaner signal due to true closed-loop active bias, at a price point close to the price of the OpenBCI when it launched (less than half the price of the Cyton now).\n\nSoftware support includes a fork of the OpenBCI GUI (via Lab Streaming Layer) and Brainflow.\n\nThe project is by former SpaceX hardware engineer Simon Hakimian.\n\nGit repository with firmware and schematic here:\n\n⇒ https://github.com/Cerelog-ESP-EEG/ESP-EEG\n\nProduct page:\n\n⇒ https://www.cerelog.com/eeg_researchers.html\n\nUsage guide:\n\n⇒ https://www.cerelog.com/eeg_researchers_guide.html\n\nSocials:\n\n⇒ https://x.com/CerelogOfficial\n\nAnnouncement post on Reddit r/BCI:\n\n⇒ https://old.reddit.com/r/BCI/comments/1polj4b/i_designed_an_open_source_8channel_eeg_board/\n\nMore info about where this is going:\n\n⇒ https://www.cerelog.com/investor_info.html\n\nCerelog also has a tCDS board available for pre-order:\n\n⇒ https://www.cerelog.com/tdcs_researchers.html\n\nYouTube video:\n\n⇒ https://www.youtube.com/watch?v=6XKdIbguI00\n\n**Caveats** :\n\n * It has hardware support for Bluetooth/Wifi, but the firmware isn't ready yet, so for the time being it can only be used with USB, which means it isn't electrically isolated, which means **absolutely don't ever use it with a desktop computer or a laptop that is charging**.\n\n * Some of the promo materials sound like they _could_ have been hallucinated by an LLM; but then, investor-speak has never sounded human to me.\n\n * Though the schematics and firmware are open source (MIT Licence, and CC-BY-NC-SA 4.0), the PCB layout files are specifically _not_ available, and the firmware/schematics only allow **non-commercial use**.\n\n * In the guide it says the firmware is not available unless you email; elsewhere it says it's open source under MIT licence. And in some places it says the hardware is CC-BY-NC-SA 4.0, and elsewhere it says it's merely CC-BY-SA 4.0. I'm confused!\n\n\n\n\n**Update:** Simon has clarified the licencing: “Regarding licensing, sorry about the confusion between my repo init and the docs. I have updated the repo to clarify the distinction: Firmware & Software: MIT License. I want people to build whatever they want on top of the stack. Hardware Schematics: CC-BY-NC-SA (Non-Commercial). Why the split? Since I am a solo bootstrapper, I need to protect the hardware from low-effort commercial clones while I get the business off the ground. But I strongly believe in \"Source Available\" schematics so researchers and engineers can debug, learn, and modify their own units, hence the CC-BY-NC-SA choice for the board files.”\n\n**Questions:**\n\n * This is so similar to the OpenBCI, why not just fork the OpenBCI hardware and software, and add true closed-loop active bias?\n * **Update:** Simon responds: “Why start fresh? It was an architecture decision. The Cyton uses a PIC32 + RFduino stack. I wanted to handle everything natively on the ESP32 for high-bandwidth WiFi streaming, which required a ground-up redesign. I also wanted to add onboard LiPo charging and the ability to experiment with different filter topologies. Building it from scratch helped me uncover a lot of subtle design constraints that aren't obvious until you dig into the layout.”\n\n",
"title": "Cerelog’s ESP-EEG is a new 8 channel biosensing board at a hobbyist-friendly price",
"updatedAt": "2026-05-16T04:14:25.461Z"
}