{
  "$type": "site.standard.document",
  "bskyPostRef": {
    "cid": "bafyreibusq7n4w2y4m7m3w5rly567ciasv2edieelhtrqpaftugdduucl4",
    "uri": "at://did:plc:ajcrkmnlj6rxdk7rltijv227/app.bsky.feed.post/3mofsgjrzbgb2"
  },
  "coverImage": {
    "$type": "blob",
    "ref": {
      "$link": "bafkreihqmoul4zn3f2n4criargzctdrke6ifpboi3nhztawy5w2cyvm3fy"
    },
    "mimeType": "image/jpeg",
    "size": 199625
  },
  "path": "/tech-industry/semiconductors/tsmc-says-panel-packaging-wont-replace-cowos-anytime-soon-for-the-largest-future-ai-processors-wafer-level-tech-can-scale-to-58-massive-dies-in-one-package",
  "publishedAt": "2026-06-16T11:00:00.000Z",
  "site": "https://www.tomshardware.com",
  "tags": [
    "Semiconductors",
    "Tech Industry",
    "Manufacturing"
  ],
  "textContent": "TSMC is exploring panel-level packaging and is working on its CoPoS technology, but the company's Kevin Zhang says wafer-level packaging technologies is considerably more advanced than panel-level packaging.",
  "title": "TSMC says panel packaging won't replace CoWoS anytime soon for the largest future AI processors — wafer-level tech can scale to 58 massive dies in one package",
  "updatedAt": "2026-06-16T12:08:29.000Z"
}