{
  "$type": "site.standard.document",
  "bskyPostRef": {
    "cid": "bafyreiecldjop5tq4aind7auqv42ytdhmdcoezwf7ol3ugqtd7c2ayrh44",
    "uri": "at://did:plc:ajcrkmnlj6rxdk7rltijv227/app.bsky.feed.post/3mnwoftbvser2"
  },
  "coverImage": {
    "$type": "blob",
    "ref": {
      "$link": "bafkreib6izj3hzbn3ioscpt7hrx24wgerxgdwbinxiwj5vbowyfx5ymcni"
    },
    "mimeType": "image/jpeg",
    "size": 205018
  },
  "path": "/tech-industry/semiconductors/analyzing-tsmcs-fab-expansion-roadmap-multi-fab-n2-ramp-cowos-soic-and-uncorking-bottlenecks",
  "publishedAt": "2026-06-10T11:41:11.000Z",
  "site": "https://www.tomshardware.com",
  "tags": [
    "Semiconductors",
    "Tech Industry",
    "Manufacturing"
  ],
  "textContent": "TSMC is executing the largest manufacturing expansion in semiconductor industry history that combines simultaneous multi-fab N2 ramps, AI-driven manufacturing optimizations, and massive CoWoS/SoIC packaging capacity expansion to meet increasing demand for AI accelerators.",
  "title": "Analyzing TSMC's fab expansion roadmap — multi-fab N2 ramp, CoWoS, SoIC, and uncorking bottlenecks"
}