{
  "$type": "site.standard.document",
  "bskyPostRef": {
    "cid": "bafyreiazupxtoppfpyegktkbqknwj4x352fxkzmmuqzvytcvcyqgqds5ta",
    "uri": "at://did:plc:ajcrkmnlj6rxdk7rltijv227/app.bsky.feed.post/3mmw3ueajxhh2"
  },
  "coverImage": {
    "$type": "blob",
    "ref": {
      "$link": "bafkreifvbyy5yi245olnpe54zjzza7a7bpgpapmh6h2il7s55jghs2tmcm"
    },
    "mimeType": "image/jpeg",
    "size": 247388
  },
  "path": "/tech-industry/semiconductors/peking-university-builds-3d-chip-design-tool-tailored-to-huaweis-logicfolding-architecture",
  "publishedAt": "2026-05-28T11:10:00.000Z",
  "site": "https://www.tomshardware.com",
  "tags": [
    "Semiconductors",
    "Tech Industry",
    "Manufacturing"
  ],
  "textContent": "The announcement came two days after Huawei presented LogicFolding and its accompanying Tau Scaling Law at ISCAS 2026.",
  "title": "Chinese university builds 3D chip design tool tailored to Huawei's ‘LogicFolding’ architecture — 3D design delivers increased performance and better thermal management"
}